00001
00010 #include <stdlib.h>
00011 #include <stdio.h>
00012 #include <errno.h>
00013 #include <math.h>
00014
00015 #include "capacitor.h"
00016
00018
00020 CLASS* capacitor::oclass = NULL;
00021 CLASS* capacitor::pclass = NULL;
00022
00029 capacitor::capacitor(MODULE *mod):node(mod)
00030 {
00031 if(oclass == NULL)
00032 {
00033 pclass = node::oclass;
00034
00035 oclass = gl_register_class(mod,"capacitor",sizeof(capacitor),PC_PRETOPDOWN|PC_BOTTOMUP|PC_POSTTOPDOWN|PC_UNSAFE_OVERRIDE_OMIT|PC_AUTOLOCK);
00036 if (oclass==NULL)
00037 throw "unable to register class capacitor";
00038 else
00039 oclass->trl = TRL_PROVEN;
00040
00041 if(gl_publish_variable(oclass,
00042 PT_INHERIT, "node",
00043 PT_set, "pt_phase", PADDR(pt_phase),PT_DESCRIPTION,"Phase(s) that the PT is on, used as measurement points for control",
00044 PT_KEYWORD, "A",(set)PHASE_A,
00045 PT_KEYWORD, "B",(set)PHASE_B,
00046 PT_KEYWORD, "C",(set)PHASE_C,
00047 PT_KEYWORD, "D",(set)PHASE_D,
00048 PT_KEYWORD, "N",(set)PHASE_N,
00049 PT_set, "phases_connected", PADDR(phases_connected),PT_DESCRIPTION,"phases capacitors connected to",
00050 PT_KEYWORD, "A",(set)PHASE_A,
00051 PT_KEYWORD, "B",(set)PHASE_B,
00052 PT_KEYWORD, "C",(set)PHASE_C,
00053 PT_KEYWORD, "D",(set)PHASE_D,
00054 PT_KEYWORD, "N",(set)PHASE_N,
00055 PT_enumeration, "switchA", PADDR(switchA_state),PT_DESCRIPTION,"capacitor A switch open or close",
00056 PT_KEYWORD, "OPEN", (enumeration)OPEN,
00057 PT_KEYWORD, "CLOSED", (enumeration)CLOSED,
00058 PT_enumeration, "switchB", PADDR(switchB_state),PT_DESCRIPTION,"capacitor B switch open or close",
00059 PT_KEYWORD, "OPEN", (enumeration)OPEN,
00060 PT_KEYWORD, "CLOSED", (enumeration)CLOSED,
00061 PT_enumeration, "switchC", PADDR(switchC_state),PT_DESCRIPTION,"capacitor C switch open or close",
00062 PT_KEYWORD, "OPEN", (enumeration)OPEN,
00063 PT_KEYWORD, "CLOSED", (enumeration)CLOSED,
00064 PT_enumeration, "control", PADDR(control),PT_DESCRIPTION,"control operation strategy",
00065 PT_KEYWORD, "MANUAL", (enumeration)MANUAL,
00066 PT_KEYWORD, "VAR", (enumeration)VAR,
00067 PT_KEYWORD, "VOLT", (enumeration)VOLT,
00068 PT_KEYWORD, "VARVOLT", (enumeration)VARVOLT,
00069 PT_KEYWORD, "CURRENT", (enumeration)CURRENT,
00070 PT_double, "cap_A_switch_count", PADDR(cap_switchA_count),PT_DESCRIPTION,"number of switch operations on Phase A",
00071 PT_double, "cap_B_switch_count", PADDR(cap_switchB_count),PT_DESCRIPTION,"number of switch operations on Phase B",
00072 PT_double, "cap_C_switch_count", PADDR(cap_switchC_count),PT_DESCRIPTION,"number of switch operations on Phase C",
00073 PT_double, "voltage_set_high[V]", PADDR(voltage_set_high), PT_DESCRIPTION,"Turn off if voltage is above this set point",
00074 PT_double, "voltage_set_low[V]", PADDR(voltage_set_low), PT_DESCRIPTION,"Turns on if voltage is below this set point",
00075 PT_double, "voltage_deadband_center[V]", PADDR(voltage_center), PT_DESCRIPTION,"The voltage deadband center",
00076 PT_double, "voltage_deadband[V]", PADDR(voltage_deadband), PT_DESCRIPTION,"The deadband between voltage_set_high and voltage_set_low",
00077 PT_double, "VAr_set_high[VAr]", PADDR(VAr_set_high),PT_DESCRIPTION,"high VAR set point for VAR control (turn off)",
00078 PT_double, "VAr_set_low[VAr]", PADDR(VAr_set_low),PT_DESCRIPTION,"low VAR set point for VAR control (turn on)",
00079 PT_double, "VAr_deadband_center[VAr]", PADDR(VAr_center), PT_DESCRIPTION,"The VAr deadband center",
00080 PT_double, "VAr_deadband[VAr]", PADDR(VAr_deadband), PT_DESCRIPTION,"The deadband between VAr_set_high and VAr_set_low",
00081 PT_double, "current_set_low[A]", PADDR(current_set_low),PT_DESCRIPTION,"high current set point for current control mode (turn on)",
00082 PT_double, "current_set_high[A]", PADDR(current_set_high),PT_DESCRIPTION,"low current set point for current control mode (turn off)",
00083 PT_double, "current_deadband_center[A]", PADDR(current_center), PT_DESCRIPTION,"The current deadband center",
00084 PT_double, "current_deadband[A]", PADDR(current_deadband), PT_DESCRIPTION,"The deadband between current_set_high and current_set_low",
00085 PT_double, "capacitor_A[VAr]", PADDR(capacitor_A),PT_DESCRIPTION,"Capacitance value for phase A or phase AB",
00086 PT_double, "capacitor_B[VAr]", PADDR(capacitor_B),PT_DESCRIPTION,"Capacitance value for phase B or phase BC",
00087 PT_double, "capacitor_C[VAr]", PADDR(capacitor_C),PT_DESCRIPTION,"Capacitance value for phase C or phase CA",
00088 PT_double, "cap_nominal_voltage[V]", PADDR(cap_nominal_voltage),PT_DESCRIPTION,"Nominal voltage for the capacitor. Used for calculation of capacitance value",
00089 PT_double, "time_delay[s]", PADDR(time_delay),PT_DESCRIPTION,"control time delay",
00090 PT_double, "dwell_time[s]", PADDR(dwell_time),PT_DESCRIPTION,"Time for system to remain constant before a state change will be passed",
00091 PT_double, "lockout_time[s]", PADDR(lockout_time),PT_DESCRIPTION,"Time for capacitor to remain locked out from further switching operations (VARVOLT control)",
00092 PT_object, "remote_sense",PADDR(RemoteSensor),PT_DESCRIPTION,"Remote object for sensing values used for control schemes",
00093 PT_object, "remote_sense_B", PADDR(SecondaryRemote),PT_DESCRIPTION,"Secondary Remote object for sensing values used for control schemes (VARVOLT uses two)",
00094 PT_enumeration, "control_level", PADDR(control_level),PT_DESCRIPTION,"define bank or individual control",
00095 PT_KEYWORD, "BANK", (enumeration)BANK,
00096 PT_KEYWORD, "INDIVIDUAL", (enumeration)INDIVIDUAL,
00097 NULL) < 1) GL_THROW("unable to publish properties in %s",__FILE__);
00098
00099
00100 if (gl_publish_function(oclass, "interupdate_pwr_object", (FUNCTIONADDR)interupdate_capacitor)==NULL)
00101 GL_THROW("Unable to publish capacitor deltamode function");
00102 if (gl_publish_function(oclass, "pwr_object_swing_swapper", (FUNCTIONADDR)swap_node_swing_status)==NULL)
00103 GL_THROW("Unable to publish capacitor swing-swapping function");
00104 }
00105 }
00106
00107 int capacitor::create()
00108 {
00109 int result = node::create();
00110
00111
00112 switchA_state = OPEN;
00113 switchB_state = OPEN;
00114 switchC_state = OPEN;
00115 cap_switchA_count = -1;
00116 cap_switchB_count = -1;
00117 cap_switchC_count = -1;
00118 switchA_state_Next = OPEN;
00119 switchB_state_Next = OPEN;
00120 switchC_state_Next = OPEN;
00121 switchA_state_Prev = OPEN;
00122 switchB_state_Prev = OPEN;
00123 switchC_state_Prev = OPEN;
00124 switchA_state_Req_Next = OPEN;
00125 switchB_state_Req_Next = OPEN;
00126 switchC_state_Req_Next = OPEN;
00127 control = MANUAL;
00128 control_level = INDIVIDUAL;
00129 voltage_set_high = 0.0;
00130 voltage_set_low = 0.0;
00131 VAr_set_high = 0.0;
00132 VAr_set_low = 0.0;
00133 current_set_low = 0.0;
00134 current_set_high = 0.0;
00135 time_delay = 0.0;
00136 dwell_time = 0.0;
00137 lockout_time = 0.0;
00138 time_to_change = 0.0;
00139 dwell_time_left = 0.0;
00140 lockout_time_left_A = 0.0;
00141 lockout_time_left_B = 0.0;
00142 lockout_time_left_C = 0.0;
00143 last_time = 0.0;
00144 cap_nominal_voltage = 0.0;
00145 RemoteSensor = NULL;
00146 SecondaryRemote=NULL;
00147 RNode = NULL;
00148 RLink = NULL;
00149 VArVals[0] = VArVals[1] = VArVals[2] = 0.0;
00150 CurrentVals[0] = CurrentVals[1] = CurrentVals[2] = 0.0;
00151 voltage_center = -1.0;
00152 voltage_deadband = -1.0;
00153 VAr_center = -1.0;
00154 VAr_deadband = -1.0;
00155 current_center = -1.0;
00156 current_deadband = -1.0;
00157
00158 NotFirstIteration=false;
00159 Iteration_Toggle = false;
00160 NR_cycle_cap = true;
00161 deltamode_reiter_request = false;
00162
00163
00164 RNode_voltage[0] = RNode_voltage[1] = RNode_voltage[2] = NULL;
00165 RNode_voltaged[0] = RNode_voltaged[1] = RNode_voltaged[2] = NULL;
00166 RLink_indiv_power_in[0] = RLink_indiv_power_in[1] = RLink_indiv_power_in[2] = NULL;
00167 RLink_current_in[0] = RLink_current_in[1] = RLink_current_in[2] = NULL;
00168 RLink_calculate_power_fxn = NULL;
00169
00170 return result;
00171 }
00172
00173 int capacitor::init(OBJECT *parent)
00174 {
00175 gld_property *pSetPhases;
00176 set temp_phases;
00177 int result = node::init();
00178
00179 OBJECT *obj = OBJECTHDR(this);
00180
00181 if ((control == VARVOLT) && (SecondaryRemote!=NULL))
00182 {
00183 if (RemoteSensor==NULL)
00184 {
00185 GL_THROW("Please set the remote sensing location on capacitor:%d under \"remote_sense\"",obj->id);
00186
00187
00188
00189
00190 }
00191 else
00192 {
00193 if ((gl_object_isa(RemoteSensor,"node","powerflow")) && (gl_object_isa(SecondaryRemote,"link","powerflow")))
00194 {
00195 RNode = RemoteSensor;
00196 RLink = SecondaryRemote;
00197 }
00198 else if ((gl_object_isa(RemoteSensor,"link","powerflow")) && (gl_object_isa(SecondaryRemote,"node","powerflow")))
00199 {
00200 RNode = SecondaryRemote;
00201 RLink = RemoteSensor;
00202 }
00203 else if ((gl_object_isa(RemoteSensor,"network_interface")) && (gl_object_isa(SecondaryRemote,"network_interface")))
00204 {
00205
00206 RNode = RemoteSensor;
00207 RLink = SecondaryRemote;
00208 }
00209 else
00210 {
00211 GL_THROW("For two remote sensors, Capacitor:%d requires one link and one node object specified.",obj->id);
00212
00213
00214
00215
00216 }
00217 }
00218 }
00219 else if (((control==VARVOLT) || (control==CURRENT)) && (SecondaryRemote==NULL) && (RemoteSensor != NULL) && (gl_object_isa(RemoteSensor,"link","powerflow") || gl_object_isa(RemoteSensor,"network_interface")))
00220 {
00221 RLink = RemoteSensor;
00222 }
00223 else if (SecondaryRemote != NULL)
00224 {
00225 gl_warning("Capacitor:%d has a secondary sensor specified, but is not in VARVOLT control. This will be ignored.",obj->id);
00226
00227
00228
00229
00230 }
00231
00232 if ((RemoteSensor != NULL) && (control != VARVOLT))
00233 {
00234 if (gl_object_isa(RemoteSensor,"node","powerflow"))
00235 {
00236 RNode = RemoteSensor;
00237 }
00238 else if (gl_object_isa(RemoteSensor,"link","powerflow"))
00239 {
00240 RLink = RemoteSensor;
00241 }
00242 else if (gl_object_isa(RemoteSensor,"network_interface"))
00243 {
00244 gl_warning("Capacitor:%d - %s - the remote_sense object is a network_interface, node/link connections both enabled",obj->id,(obj->name ? obj->name : "Unnamed"));
00245
00246
00247
00248
00249
00250
00251 RNode = RemoteSensor;
00252 RLink = RemoteSensor;
00253 }
00254 }
00255
00256 if ((capacitor_A == 0.0) && (capacitor_B == 0.0) && (capacitor_C == 0.0))
00257 gl_error("Capacitor:%d does not have any capacitance values defined!",obj->id);
00258
00259
00260
00261
00262
00263
00264 if (cap_nominal_voltage==0.0)
00265 {
00266 cap_nominal_voltage=nominal_voltage;
00267 }
00268
00269 if ((cap_nominal_voltage==0.0) && (nominal_voltage==0.0))
00270 GL_THROW("Capcitor:%d does not have a node nominal or capacitor nominal voltage specified.",obj->id);
00271
00272
00273
00274
00275
00276
00277 cap_value[0] = complex(0,capacitor_A/(cap_nominal_voltage * cap_nominal_voltage));
00278 cap_value[1] = complex(0,capacitor_B/(cap_nominal_voltage * cap_nominal_voltage));
00279 cap_value[2] = complex(0,capacitor_C/(cap_nominal_voltage * cap_nominal_voltage));
00280
00281 if ((control == VOLT) && ((voltage_set_high == 0) || (voltage_set_low == 0)))
00282 gl_warning("Capacitor:%d does not have one or both of its voltage set points set.",obj->id);
00283
00284
00285
00286
00287
00288 if ((control == VARVOLT) && (voltage_set_high == 0))
00289 gl_warning("Capacitor:%d does not have its upper voltage limit set.",obj->id);
00290
00291
00292
00293
00294
00295 if (((control == VAR) || (control == VARVOLT) ) && ((VAr_set_high == 0) || (VAr_set_low == 0)))
00296 gl_warning("Capacitor:%d does not have one or both of its VAr set points set.",obj->id);
00297
00298
00299
00300
00301
00302 if ((control==CURRENT) && ((current_set_high == 0) || (current_set_low == 0)))
00303 gl_warning("Capacitor:%d does not have one or both of its current set points set.",obj->id);
00304
00305
00306
00307
00308
00309 if (((control == VAR) || (control == VARVOLT) || (control==CURRENT)) && (RLink == NULL))
00310 GL_THROW("VAR, VARVOLT, or CURRENT control on capacitor:%d requires a remote link to monitor.",obj->id);
00311
00312
00313
00314
00315
00316 if (((control==VAR) || (control==VARVOLT)) && (VAr_set_low > VAr_set_high))
00317 GL_THROW("The lower VAr limit of capacitor:%d is larger than the high limit setpoint!",obj->id);
00318
00319
00320
00321
00322 if (((control==VOLT) || (control==VARVOLT)) && (voltage_set_low > voltage_set_high))
00323 GL_THROW("The lower voltage limit of capacitor:%d is larger than the high limit setpoint!",obj->id);
00324
00325
00326
00327
00328 if ((control==CURRENT) && (current_set_low > current_set_high))
00329 GL_THROW("The lower current limit of capacitor:%d is larger than the high limit setpoint!",obj->id);
00330
00331
00332
00333
00334 if ((control != MANUAL) && (time_delay == 0) && (dwell_time==0))
00335 gl_warning("Automatic controls can oscillate to the iteration limit with no time delays. To prevent this, ensure your switching limits are reasonable.");
00336
00337
00338
00339
00340
00341 if ((control == VARVOLT) && (lockout_time==0))
00342 gl_warning("No lockout time specified for capacitor:%d's VAR-VOLT control scheme. May switch excessively.",obj->id);
00343
00344
00345
00346
00347 if ((control != MANUAL) && ((pt_phase & (PHASE_A | PHASE_B | PHASE_C)) == 0))
00348 GL_THROW("Capacitor:%d is set to an automatic scheme, but is not monitoring any phases.",obj->id);
00349
00350
00351
00352
00353
00354
00355 if ((control == MANUAL) && (control_level == BANK) && ((pt_phase & (PHASE_A | PHASE_B | PHASE_C)) == 0))
00356 gl_warning("Capacitor:%d is set to manual bank mode, but does not know which phase to monitor.",obj->id);
00357
00358
00359
00360
00361
00362 if ((phases_connected & (PHASE_A | PHASE_B | PHASE_C)) == 0)
00363 {
00364 gl_warning("No capacitor phase connection information is available for capacitor:%d. Defaulting to the phases property.",obj->id);
00365
00366
00367
00368
00369
00370 phases_connected = phases;
00371 }
00372
00373
00374 switchA_state_Req_Next = switchA_state_Prev = switchA_state_Next = (CAPSWITCH)switchA_state;
00375 switchB_state_Req_Next = switchB_state_Prev = switchB_state_Next = (CAPSWITCH)switchB_state;
00376 switchC_state_Req_Next = switchC_state_Prev = switchC_state_Next = (CAPSWITCH)switchC_state;
00377
00378
00379 if ((control!=MANUAL) && (control!=VOLT))
00380 {
00381
00382 pSetPhases = new gld_property(RLink,"phases");
00383
00384
00385 if ((pSetPhases->is_valid() != true) || (pSetPhases->is_set() != true))
00386 {
00387 GL_THROW("Capacitor:%d - %s - Unable to map phases for remote link object",obj->id,(obj->name ? obj->name : "Unnamed"));
00388
00389
00390
00391
00392 }
00393
00394
00395 temp_phases = pSetPhases->get_set();
00396
00397
00398 delete pSetPhases;
00399
00400
00401 if ((temp_phases & pt_phase) != pt_phase)
00402 {
00403 GL_THROW("One of the monitored remote link phases for capacitor:%d does not exist",obj->id);
00404
00405
00406
00407
00408
00409 }
00410 }
00411 else if (((control==VOLT) || (control==VARVOLT)) && (RNode != NULL))
00412 {
00413
00414 pSetPhases = new gld_property(RNode,"phases");
00415
00416
00417 if ((pSetPhases->is_valid() != true) || (pSetPhases->is_set() != true))
00418 {
00419 GL_THROW("Capacitor:%d - %s - Unable to map phases for remote node object",obj->id,(obj->name ? obj->name : "Unnamed"));
00420
00421
00422
00423
00424 }
00425
00426
00427 temp_phases = pSetPhases->get_set();
00428
00429
00430 delete pSetPhases;
00431
00432
00433 if ((temp_phases & pt_phase) != pt_phase)
00434 {
00435 GL_THROW("One of the monitored remote node phases for capacitor:%d does not exist",obj->id);
00436
00437
00438
00439
00440
00441 }
00442 }
00443 else if (((control==VOLT) || (control==VARVOLT)) && (RNode == NULL) && ((phases & pt_phase) != pt_phase))
00444 {
00445 GL_THROW("One of the monitored node phases for capacitor:%d does not exist",obj->id);
00446
00447
00448
00449
00450
00451 }
00452
00453
00454 if ((control==VAR) || (control==VARVOLT))
00455 {
00456
00457 RLink_calculate_power_fxn = (FUNCTIONADDR)(gl_get_function(RLink,"update_power_pwr_object"));
00458
00459
00460 if (RLink_calculate_power_fxn == NULL)
00461 {
00462 GL_THROW("Capacitor:%d - %s - Unable to map link power calculation function",obj->id,(obj->name ? obj->name : "Unnamed"));
00463
00464
00465
00466
00467 }
00468 }
00469
00470
00471
00472 if (RLink != NULL)
00473 {
00474
00475 RLink_indiv_power_in[0] = new gld_property(RLink,"power_in_A");
00476
00477
00478 if ((RLink_indiv_power_in[0]->is_valid() != true) || (RLink_indiv_power_in[0]->is_complex() != true))
00479 {
00480 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00481
00482
00483
00484
00485 }
00486
00487
00488 RLink_indiv_power_in[1] = new gld_property(RLink,"power_in_B");
00489
00490
00491 if ((RLink_indiv_power_in[1]->is_valid() != true) || (RLink_indiv_power_in[1]->is_complex() != true))
00492 {
00493 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00494
00495 }
00496
00497
00498 RLink_indiv_power_in[2] = new gld_property(RLink,"power_in_C");
00499
00500
00501 if ((RLink_indiv_power_in[2]->is_valid() != true) || (RLink_indiv_power_in[2]->is_complex() != true))
00502 {
00503 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00504
00505 }
00506
00507
00508 RLink_current_in[0] = new gld_property(RLink,"current_in_A");
00509
00510
00511 if ((RLink_current_in[0]->is_valid() != true) || (RLink_current_in[0]->is_complex() != true))
00512 {
00513 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00514
00515 }
00516
00517
00518 RLink_current_in[1] = new gld_property(RLink,"current_in_B");
00519
00520
00521 if ((RLink_current_in[1]->is_valid() != true) || (RLink_current_in[1]->is_complex() != true))
00522 {
00523 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00524
00525 }
00526
00527
00528 RLink_current_in[2] = new gld_property(RLink,"current_in_C");
00529
00530
00531 if ((RLink_current_in[2]->is_valid() != true) || (RLink_current_in[2]->is_complex() != true))
00532 {
00533 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00534
00535 }
00536 }
00537
00538
00539
00540 if (RNode != NULL)
00541 {
00542
00543 RNode_voltage[0] = new gld_property(RNode,"voltage_A");
00544
00545
00546 if ((RNode_voltage[0]->is_valid() != true) || (RNode_voltage[0]->is_complex() != true))
00547 {
00548 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00549
00550 }
00551
00552
00553 RNode_voltage[1] = new gld_property(RNode,"voltage_B");
00554
00555
00556 if ((RNode_voltage[1]->is_valid() != true) || (RNode_voltage[1]->is_complex() != true))
00557 {
00558 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00559
00560 }
00561
00562
00563 RNode_voltage[2] = new gld_property(RNode,"voltage_C");
00564
00565
00566 if ((RNode_voltage[2]->is_valid() != true) || (RNode_voltage[2]->is_complex() != true))
00567 {
00568 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00569
00570 }
00571
00572
00573 RNode_voltaged[0] = new gld_property(RNode,"voltage_AB");
00574
00575
00576 if ((RNode_voltaged[0]->is_valid() != true) || (RNode_voltaged[0]->is_complex() != true))
00577 {
00578 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00579
00580 }
00581
00582
00583 RNode_voltaged[1] = new gld_property(RNode,"voltage_BC");
00584
00585
00586 if ((RNode_voltaged[1]->is_valid() != true) || (RNode_voltaged[1]->is_complex() != true))
00587 {
00588 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00589
00590 }
00591
00592
00593 RNode_voltaged[2] = new gld_property(RNode,"voltage_CA");
00594
00595
00596 if ((RNode_voltaged[2]->is_valid() != true) || (RNode_voltaged[2]->is_complex() != true))
00597 {
00598 GL_THROW("Capacitor:%d - %s - Unable to map property for remote object",obj->id,(obj->name ? obj->name : "Unnamed"));
00599
00600 }
00601 }
00602
00603 if(cap_switchA_count < 0)
00604 cap_switchA_count = 0;
00605 if(cap_switchB_count < 0)
00606 cap_switchB_count = 0;
00607 if(cap_switchC_count < 0)
00608 cap_switchC_count = 0;
00609
00610 prev_time = (double)gl_globalclock;
00611
00612 prev_switchA_state = init_switchA_state = (CAPSWITCH)switchA_state;
00613 prev_switchB_state = init_switchB_state = (CAPSWITCH)switchB_state;
00614 prev_switchC_state = init_switchC_state = (CAPSWITCH)switchC_state;
00615
00616 switchA_changed = switchB_changed = switchC_changed = 2;
00617
00618 return result;
00619 }
00620
00621 TIMESTAMP capacitor::sync(TIMESTAMP t0)
00622 {
00623 double curr_time_value;
00624 bool Phase_Mismatch;
00625 TIMESTAMP result;
00626
00627
00628 curr_time_value = (double)t0;
00629
00630
00631 Phase_Mismatch = cap_sync_fxn(curr_time_value);
00632
00633
00634 result = node::sync(t0);
00635
00636
00637 if (service_status == ND_IN_SERVICE)
00638 {
00639
00640 if (dwell_time_left>0)
00641 {
00642 if (dwell_time_left < 1)
00643 result = t0 + 1;
00644 else
00645 result = t0 + (TIMESTAMP)dwell_time_left;
00646 }
00647 else if (time_to_change>0)
00648 {
00649 if (time_to_change < 1)
00650 result = t0 + 1;
00651 else
00652 result = t0 + (TIMESTAMP)time_to_change;
00653 }
00654 else;
00655
00656 if (NotFirstIteration==false)
00657 {
00658 result = t0;
00659 time_to_change = -1;
00660 NotFirstIteration=true;
00661 }
00662
00663
00664 if ((solver_method == SM_NR) && (Phase_Mismatch == true))
00665 {
00666 if ((Iteration_Toggle == true) && (NR_cycle_cap == true))
00667 {
00668 result = t0;
00669 NR_cycle_cap = false;
00670 }
00671 }
00672 }
00673
00674
00675
00676 if (result != TS_NEVER)
00677 {
00678 if (result==t0)
00679 return result;
00680 else
00681 return -result;
00682 }
00683 else
00684 return TS_NEVER;
00685 }
00686
00687
00688
00689 bool capacitor::cap_sync_fxn(double time_value)
00690 {
00691 bool Phase_Mismatch;
00692
00693
00694 Phase_Mismatch = false;
00695 if(control == VOLT || control == VARVOLT) {
00696 if(voltage_center > 0 && voltage_deadband > 0) {
00697 voltage_set_low = voltage_center - (voltage_deadband*0.5);
00698 voltage_set_high = voltage_center + (voltage_deadband*0.5);
00699 }
00700 }
00701 if(control == VAR || control == VARVOLT) {
00702 if(VAr_center > 0 && VAr_deadband > 0) {
00703 VAr_set_low = VAr_center - (VAr_deadband*0.5);
00704 VAr_set_high = VAr_center + (VAr_deadband*0.5);
00705 }
00706 }
00707 if(control == CURRENT) {
00708 if(current_center > 0 && current_deadband > 0) {
00709 current_set_low = current_center - (current_deadband*0.5);
00710 current_set_high = current_center + (current_deadband*0.5);
00711 }
00712 }
00713
00714 if (service_status == ND_IN_SERVICE)
00715 {
00716 complex VoltVals[3];
00717 complex temp_shunt[3];
00718
00719
00720 time_to_change -= (time_value - last_time);
00721 dwell_time_left -= (time_value - last_time);
00722 lockout_time_left_A -= (time_value - last_time);
00723 lockout_time_left_B -= (time_value - last_time);
00724 lockout_time_left_C -= (time_value - last_time);
00725
00726 if (last_time!=time_value)
00727 {
00728 last_time = time_value;
00729 }
00730
00731 if (control==MANUAL)
00732 {
00733 if (switchA_state != switchA_state_Prev)
00734 {
00735 if ((control_level == BANK) && ((pt_phase & PHASE_A) != PHASE_A) && (time_delay==0))
00736 {
00737 switchA_state = switchA_state_Next;
00738 }
00739 else
00740 {
00741 switchA_state_Next =(CAPSWITCH) switchA_state;
00742 switchA_state = switchA_state_Prev;
00743 }
00744 time_to_change=time_delay;
00745 }
00746
00747 if (switchB_state != switchB_state_Prev)
00748 {
00749 if ((control_level == BANK) && ((pt_phase & PHASE_B) != PHASE_B) && (time_delay==0))
00750 {
00751 switchB_state = switchB_state_Next;
00752 }
00753 else
00754 {
00755 switchB_state_Next = (CAPSWITCH)switchB_state;
00756 switchB_state = switchB_state_Prev;
00757 }
00758 time_to_change=time_delay;
00759 }
00760
00761 if (switchC_state != switchC_state_Prev)
00762 {
00763 if ((control_level == BANK) && ((pt_phase & PHASE_C) != PHASE_C) && (time_delay==0))
00764 {
00765 switchC_state = switchC_state_Next;
00766 }
00767 else
00768 {
00769 switchC_state_Next = (CAPSWITCH)switchC_state;
00770 switchC_state = switchC_state_Prev;
00771 }
00772 time_to_change=time_delay;
00773 }
00774 }
00775
00776 if ((time_to_change<=0) && NotFirstIteration)
00777 {
00778
00779 if ((phases_connected & (PHASE_A)) == PHASE_A)
00780 switchA_state=switchA_state_Next;
00781
00782 if ((phases_connected & (PHASE_B)) == PHASE_B)
00783 switchB_state=switchB_state_Next;
00784
00785 if ((phases_connected & (PHASE_C)) == PHASE_C)
00786 switchC_state=switchC_state_Next;
00787
00788
00789 if ((control==VOLT) || (control==VARVOLT))
00790 {
00791 if ((pt_phase & PHASE_D) != (PHASE_D))
00792 {
00793 if (RNode == NULL)
00794 {
00795 VoltVals[0] = voltage[0];
00796 VoltVals[1] = voltage[1];
00797 VoltVals[2] = voltage[2];
00798 }
00799 else
00800 {
00801 VoltVals[0] = RNode_voltage[0]->get_complex();
00802 VoltVals[1] = RNode_voltage[1]->get_complex();
00803 VoltVals[2] = RNode_voltage[2]->get_complex();
00804 }
00805 }
00806 else
00807 {
00808 if (RNode == NULL)
00809 {
00810 VoltVals[0] = voltaged[0];
00811 VoltVals[1] = voltaged[1];
00812 VoltVals[2] = voltaged[2];
00813 }
00814 else
00815 {
00816 VoltVals[0] = RNode_voltaged[0]->get_complex();
00817 VoltVals[1] = RNode_voltaged[1]->get_complex();
00818 VoltVals[2] = RNode_voltaged[2]->get_complex();
00819 }
00820 }
00821 }
00822 else;
00823
00824
00825 switch (control) {
00826 case MANUAL:
00827 {
00828 switchA_state_Prev = switchA_state_Next;
00829 switchB_state_Prev = switchB_state_Next;
00830 switchC_state_Prev = switchC_state_Next;
00831 }
00832 break;
00833 case VARVOLT:
00834 case VAR:
00835 {
00836
00837 if ((pt_phase & PHASE_A) == PHASE_A)
00838 {
00839 if (VAr_set_low >= VArVals[0])
00840 switchA_state_Req_Next=OPEN;
00841 else if (VAr_set_high <= VArVals[0])
00842 switchA_state_Req_Next=CLOSED;
00843 else;
00844 }
00845
00846 if ((pt_phase & PHASE_B) == PHASE_B)
00847 {
00848 if (VAr_set_low >= VArVals[1])
00849 switchB_state_Req_Next=OPEN;
00850 else if (VAr_set_high <= VArVals[1])
00851 switchB_state_Req_Next=CLOSED;
00852 else;
00853 }
00854
00855 if ((pt_phase & PHASE_C) == PHASE_C)
00856 {
00857 if (VAr_set_low >= VArVals[2])
00858 switchC_state_Req_Next=OPEN;
00859 else if (VAr_set_high <= VArVals[2])
00860 switchC_state_Req_Next=CLOSED;
00861 else;
00862 }
00863
00864
00865 if (control == VARVOLT)
00866 {
00867 bool lockout_state_change[3];
00868 lockout_state_change[0] = lockout_state_change[1] = lockout_state_change[2] = false;
00869
00870 if ((pt_phase & PHASE_D) != (PHASE_D))
00871 {
00872 if (lockout_time_left_A <= 0)
00873 {
00874 if (((pt_phase & PHASE_A) == PHASE_A) && (VoltVals[0].Mag() >= voltage_set_high))
00875 {
00876 switchA_state_Req_Next=OPEN;
00877 lockout_state_change[0] = true;
00878 }
00879 }
00880 else
00881 {
00882 switchA_state_Req_Next=OPEN;
00883 }
00884
00885 if (lockout_time_left_B <= 0)
00886 {
00887 if (((pt_phase & PHASE_B) == PHASE_B) && (VoltVals[1].Mag() >= voltage_set_high))
00888 {
00889 switchB_state_Req_Next=OPEN;
00890 lockout_state_change[1] = true;
00891 }
00892 }
00893 else
00894 {
00895 switchB_state_Req_Next=OPEN;
00896 }
00897
00898 if (lockout_time_left_C <= 0)
00899 {
00900 if (((pt_phase & PHASE_C) == PHASE_C) && (VoltVals[2].Mag() >= voltage_set_high))
00901 {
00902 switchC_state_Req_Next=OPEN;
00903 lockout_state_change[2] = true;
00904 }
00905 }
00906 else
00907 {
00908 switchC_state_Req_Next=OPEN;
00909 }
00910 }
00911 else
00912 {
00913 if (lockout_time_left_A <= 0)
00914 {
00915 if (((pt_phase & (PHASE_A | PHASE_B)) == (PHASE_A | PHASE_B)) && (VoltVals[0].Mag() >= voltage_set_high))
00916 {
00917 switchA_state_Req_Next=OPEN;
00918 lockout_state_change[0] = true;
00919 }
00920 }
00921 else
00922 {
00923 switchA_state_Req_Next=OPEN;
00924 }
00925
00926 if (lockout_time_left_B <= 0)
00927 {
00928 if (((pt_phase & (PHASE_B | PHASE_C)) == (PHASE_B | PHASE_C)) && (VoltVals[1].Mag() >= voltage_set_high))
00929 {
00930 switchB_state_Req_Next=OPEN;
00931 lockout_state_change[1] = true;
00932 }
00933 }
00934 else
00935 {
00936 switchB_state_Req_Next=OPEN;
00937 }
00938
00939 if (lockout_time_left_C <= 0)
00940 {
00941 if (((pt_phase & (PHASE_C | PHASE_A)) == (PHASE_C | PHASE_A)) && (VoltVals[2].Mag() >= voltage_set_high))
00942 {
00943 switchC_state_Req_Next=OPEN;
00944 lockout_state_change[2] = true;
00945 }
00946 }
00947 else
00948 {
00949 switchC_state_Req_Next=OPEN;
00950 }
00951 }
00952
00953 if ((control_level == BANK) && (lockout_state_change[0] | lockout_state_change[1] | lockout_state_change[2]))
00954 {
00955 lockout_time_left_A = lockout_time_left_B = lockout_time_left_C = lockout_time;
00956 }
00957 else if ((control_level == INDIVIDUAL) && (lockout_state_change[0] | lockout_state_change[1] | lockout_state_change[2]))
00958 {
00959 if (lockout_state_change[0]==true)
00960 lockout_time_left_A = lockout_time;
00961
00962 if (lockout_state_change[1]==true)
00963 lockout_time_left_B = lockout_time;
00964
00965 if (lockout_state_change[2]==true)
00966 lockout_time_left_C = lockout_time;
00967 }
00968 else;
00969 }
00970 }
00971 break;
00972 case VOLT:
00973 {
00974 if ((pt_phase & PHASE_D) != (PHASE_D))
00975 {
00976 if ((pt_phase & PHASE_A) == PHASE_A)
00977 {
00978 if (voltage_set_low >= VoltVals[0].Mag())
00979 switchA_state_Req_Next=CLOSED;
00980 else if (voltage_set_high <= VoltVals[0].Mag())
00981 switchA_state_Req_Next=OPEN;
00982 else;
00983 }
00984
00985 if ((pt_phase & PHASE_B) == PHASE_B)
00986 {
00987 if (voltage_set_low >= VoltVals[1].Mag())
00988 switchB_state_Req_Next=CLOSED;
00989 else if (voltage_set_high <= VoltVals[1].Mag())
00990 switchB_state_Req_Next=OPEN;
00991 else;
00992 }
00993
00994 if ((pt_phase & PHASE_C) == PHASE_C)
00995 {
00996 if (voltage_set_low >= VoltVals[2].Mag())
00997 switchC_state_Req_Next=CLOSED;
00998 else if (voltage_set_high <= VoltVals[2].Mag())
00999 switchC_state_Req_Next=OPEN;
01000 else;
01001 }
01002 }
01003 else
01004 {
01005 if ((pt_phase & (PHASE_A | PHASE_B)) == (PHASE_A | PHASE_B))
01006 {
01007 if (voltage_set_low >= VoltVals[0].Mag())
01008 switchA_state_Req_Next=CLOSED;
01009 else if (voltage_set_high <= VoltVals[0].Mag())
01010 switchA_state_Req_Next=OPEN;
01011 else;
01012 }
01013
01014 if ((pt_phase & (PHASE_B | PHASE_C)) == (PHASE_B | PHASE_C))
01015 {
01016 if (voltage_set_low >= VoltVals[1].Mag())
01017 switchB_state_Req_Next=CLOSED;
01018 else if (voltage_set_high <= VoltVals[1].Mag())
01019 switchB_state_Req_Next=OPEN;
01020 else;
01021 }
01022
01023 if ((pt_phase & (PHASE_C | PHASE_A)) == (PHASE_C | PHASE_A))
01024 {
01025 if (voltage_set_low >= VoltVals[2].Mag())
01026 switchC_state_Req_Next=CLOSED;
01027 else if (voltage_set_high <= VoltVals[2].Mag())
01028 switchC_state_Req_Next=OPEN;
01029 else;
01030 }
01031 }
01032 }
01033 break;
01034 case CURRENT:
01035 {
01036 if ((pt_phase & PHASE_A) == PHASE_A)
01037 {
01038 if (current_set_low >= CurrentVals[0])
01039 switchA_state_Req_Next=OPEN;
01040 else if (current_set_high <= CurrentVals[0])
01041 switchA_state_Req_Next=CLOSED;
01042 else;
01043 }
01044
01045 if ((pt_phase & PHASE_B) == PHASE_B)
01046 {
01047 if (current_set_low >= CurrentVals[1])
01048 switchB_state_Req_Next=OPEN;
01049 else if (current_set_high <= CurrentVals[1])
01050 switchB_state_Req_Next=CLOSED;
01051 else;
01052 }
01053
01054 if ((pt_phase & PHASE_C) == PHASE_C)
01055 {
01056 if (current_set_low >= CurrentVals[2])
01057 switchC_state_Req_Next=OPEN;
01058 else if (current_set_high <= CurrentVals[2])
01059 switchC_state_Req_Next=CLOSED;
01060 else;
01061 }
01062 }
01063 break;
01064 default:
01065 break;
01066 }
01067
01068
01069 if (((switchA_state_Prev != switchA_state_Req_Next) || (switchB_state_Prev != switchB_state_Req_Next) || (switchC_state_Prev != switchC_state_Req_Next)) && (control != MANUAL))
01070 {
01071 dwell_time_left = dwell_time;
01072 switchA_state_Prev = switchA_state_Req_Next;
01073 switchB_state_Prev = switchB_state_Req_Next;
01074 switchC_state_Prev = switchC_state_Req_Next;
01075 }
01076
01077 if ((dwell_time_left <= 0) && (control!=MANUAL))
01078 {
01079 switchA_state_Next = switchA_state_Req_Next;
01080 switchB_state_Next = switchB_state_Req_Next;
01081 switchC_state_Next = switchC_state_Req_Next;
01082 }
01083
01084 if (control_level == BANK)
01085 {
01086 bool bank_A, bank_B, bank_C;
01087
01088 if ((pt_phase & PHASE_D) != (PHASE_D))
01089 {
01090 bank_A = (((pt_phase & PHASE_A) == PHASE_A) && (switchA_state_Next == CLOSED));
01091 bank_B = (((pt_phase & PHASE_B) == PHASE_B) && (switchB_state_Next == CLOSED));
01092 bank_C = (((pt_phase & PHASE_C) == PHASE_C) && (switchC_state_Next == CLOSED));
01093 }
01094 else
01095 {
01096 bank_A = (((pt_phase & (PHASE_A | PHASE_B)) == (PHASE_A | PHASE_B)) && (switchA_state_Next == CLOSED));
01097 bank_B = (((pt_phase & (PHASE_B | PHASE_C)) == (PHASE_B | PHASE_C)) && (switchB_state_Next == CLOSED));
01098 bank_C = (((pt_phase & (PHASE_C | PHASE_A)) == (PHASE_C | PHASE_A)) && (switchC_state_Next == CLOSED));
01099 }
01100
01101 if (control==MANUAL)
01102 {
01103 if ((bank_A | bank_B | bank_C) == true)
01104 switchA_state_Next = switchB_state_Next = switchC_state_Next = CLOSED;
01105 else
01106 switchA_state_Next = switchB_state_Next = switchC_state_Next = OPEN;
01107
01108 switchA_state_Prev = switchB_state_Prev = switchC_state_Prev = switchA_state_Next;
01109
01110 switchA_state = switchB_state = switchC_state = switchA_state_Next;
01111 }
01112 else
01113 {
01114 if ((bank_A | bank_B | bank_C) == true)
01115 switchA_state_Next = switchB_state_Next = switchC_state_Next = CLOSED;
01116 else
01117 switchA_state_Next = switchB_state_Next = switchC_state_Next = OPEN;
01118
01119 switchA_state_Req_Next = switchB_state_Req_Next = switchC_state_Req_Next = switchA_state_Next;
01120 }
01121 }
01122
01123
01124
01125 if ((switchA_state != switchA_state_Next) | (switchB_state != switchB_state_Next) | (switchC_state != switchC_state_Next))
01126 time_to_change=time_delay;
01127 else
01128 time_to_change=-1;
01129
01130 }
01131
01132
01133
01134 if ((((phases_connected & PHASE_D) != PHASE_D) && ((phases & PHASE_D) != PHASE_D)) || ((phases_connected & PHASE_D) == PHASE_D) && ((phases & PHASE_D) == PHASE_D))
01135 {
01136 temp_shunt[0] = cap_value[0];
01137 temp_shunt[1] = cap_value[1];
01138 temp_shunt[2] = cap_value[2];
01139 }
01140 else if (((phases_connected & PHASE_D) != PHASE_D) && ((phases & PHASE_D) == PHASE_D))
01141 {
01142 GL_THROW("Capacitor:%d is Wye-connected on a Delta-connected node. This is not supported at this time.",OBJECTHDR(this)->id);
01143
01144
01145
01146
01147 }
01148 else if (((phases_connected & PHASE_D) == PHASE_D) && ((phases & PHASE_D) != PHASE_D))
01149 {
01150 complex cap_temp[3];
01151 complex numer;
01152
01153 cap_temp[0] = cap_temp[1] = cap_temp[2] = 0.0;
01154
01155
01156 if (((phases_connected & PHASE_A) == PHASE_A) && (switchA_state==CLOSED))
01157 cap_temp[0] = cap_value[0];
01158
01159 if (((phases_connected & PHASE_B) == PHASE_B) && (switchB_state==CLOSED))
01160 cap_temp[1] = cap_value[1];
01161
01162 if (((phases_connected & PHASE_C) == PHASE_C) && (switchC_state==CLOSED))
01163 cap_temp[2] = cap_value[2];
01164
01165
01166 temp_shunt[0] = (voltaged[0]*cap_temp[0] - voltaged[2]*cap_temp[2]) / voltage[0];
01167 temp_shunt[1] = (voltaged[1]*cap_temp[1] - voltaged[0]*cap_temp[0]) / voltage[1];
01168 temp_shunt[2] = (voltaged[2]*cap_temp[2] - voltaged[1]*cap_temp[1]) / voltage[2];
01169
01170 Phase_Mismatch = true;
01171 }
01172 else
01173 GL_THROW("Unable to determine connection for capacitor:%d",OBJECTHDR(this)->id);
01174
01175
01176
01177
01178
01179 if (Phase_Mismatch==true)
01180 {
01181 shunt[0] = temp_shunt[0];
01182 shunt[1] = temp_shunt[1];
01183 shunt[2] = temp_shunt[2];
01184 }
01185 else
01186 {
01187
01188 if ((phases_connected & (PHASE_A)) == PHASE_A)
01189 shunt[0] = switchA_state==CLOSED ? temp_shunt[0] : complex(0.0);
01190
01191 if ((phases_connected & (PHASE_B)) == PHASE_B)
01192 shunt[1] = switchB_state==CLOSED ? temp_shunt[1] : complex(0.0);
01193
01194 if ((phases_connected & (PHASE_C)) == PHASE_C)
01195 shunt[2] = switchC_state==CLOSED ? temp_shunt[2] : complex(0.0);
01196 }
01197 }
01198 else
01199 {
01200
01201
01202 time_to_change = time_delay;
01203 dwell_time_left = dwell_time;
01204 lockout_time_left_A = lockout_time;
01205 lockout_time_left_B = lockout_time;
01206 lockout_time_left_C = lockout_time;
01207 last_time = time_value;
01208
01209
01210 if ((phases_connected & (PHASE_A)) == PHASE_A)
01211 shunt[0] = complex(0.0);
01212
01213 if ((phases_connected & (PHASE_B)) == PHASE_B)
01214 shunt[1] = complex(0.0);
01215
01216 if ((phases_connected & (PHASE_C)) == PHASE_C)
01217 shunt[2] = complex(0.0);
01218 }
01219
01220
01221 return Phase_Mismatch;
01222 }
01223
01224 TIMESTAMP capacitor::postsync(TIMESTAMP t0)
01225 {
01226 TIMESTAMP result;
01227 double result_dbl, t0_dbl;
01228 int retvalue;
01229
01230
01231 t0_dbl = (double)t0;
01232
01233 retvalue = cap_prePost_fxn(t0_dbl);
01234
01235
01236 if (retvalue != 1)
01237 {
01238 return TS_INVALID;
01239 }
01240
01241
01242 result=node::postsync(t0);
01243
01244
01245 if (result == TS_NEVER)
01246 {
01247 result_dbl = TSNVRDBL;
01248 }
01249 else
01250 {
01251 result_dbl = (double)result;
01252 }
01253
01254
01255 result_dbl = cap_postPost_fxn(result_dbl,t0_dbl);
01256
01257
01258 if (result_dbl != TSNVRDBL)
01259 {
01260 result = (TIMESTAMP)result_dbl;
01261 }
01262 else
01263 {
01264 result = TS_NEVER;
01265 }
01266
01267 return result;
01268 }
01269
01270
01271 int capacitor::cap_prePost_fxn(double time_value)
01272 {
01273 if(prev_time < time_value){
01274 Iteration_Toggle = false;
01275 NR_cycle_cap = true;
01276 prev_time = time_value;
01277 init_switchA_state =(CAPSWITCH) prev_switchA_state;
01278 init_switchB_state =(CAPSWITCH) prev_switchB_state;
01279 init_switchC_state =(CAPSWITCH) prev_switchC_state;
01280 switchA_changed = 0;
01281 switchB_changed = 0;
01282 switchC_changed = 0;
01283 if(prev_switchA_state != switchA_state){
01284 prev_switchA_state = (CAPSWITCH)switchA_state;
01285 cap_switchA_count++;
01286 switchA_changed = 1;
01287 }
01288 if(prev_switchB_state != switchB_state){
01289 prev_switchB_state = (CAPSWITCH)switchB_state;
01290 cap_switchB_count++;
01291 switchB_changed = 1;
01292 }
01293 if(prev_switchC_state != switchC_state){
01294 prev_switchC_state = (CAPSWITCH)switchC_state;
01295 cap_switchC_count++;
01296 switchC_changed = 1;
01297 }
01298 }
01299 else
01300 Iteration_Toggle = true;
01301
01302 if(prev_time == time_value){
01303 if(switchA_changed == 0){
01304 if(prev_switchA_state != switchA_state){
01305 prev_switchA_state = (CAPSWITCH)switchA_state;
01306 cap_switchA_count++;
01307 switchA_changed = 1;
01308 }
01309 }
01310 if(switchA_changed == 1){
01311 if(init_switchA_state == switchA_state){
01312 prev_switchA_state = (CAPSWITCH)switchA_state;
01313 cap_switchA_count--;
01314 if(cap_switchA_count < 0){
01315 gl_error("Unusual control of the capacitor has resulted in a negative switch change count on phase A.");
01316 return 0;
01317 }
01318 switchA_changed = 0;
01319 } else if(prev_switchA_state != switchA_state){
01320 prev_switchA_state = (CAPSWITCH)switchA_state;
01321 }
01322 }
01323 if(switchA_changed == 2){
01324 prev_switchA_state = (CAPSWITCH)switchA_state;
01325 }
01326 if(switchB_changed == 0){
01327 if(prev_switchB_state != switchB_state){
01328 prev_switchB_state = (CAPSWITCH)switchB_state;
01329 cap_switchB_count++;
01330 switchB_changed = 1;
01331 }
01332 }
01333 if(switchB_changed == 1){
01334 if(init_switchB_state == switchB_state){
01335 prev_switchB_state =(CAPSWITCH)switchB_state;
01336 cap_switchB_count--;
01337 if(cap_switchB_count < 0){
01338 gl_error("Unusual control of the capacitor has resulted in a negative switch change count on phase B.");
01339 return 0;
01340 }
01341 switchB_changed = 0;
01342 } else if(prev_switchB_state != switchB_state){
01343 prev_switchB_state = (CAPSWITCH)switchB_state;
01344 }
01345 }
01346 if(switchB_changed == 2){
01347 prev_switchB_state = (CAPSWITCH)switchB_state;
01348 }
01349 if(switchC_changed == 0){
01350 if(prev_switchC_state != switchC_state){
01351 prev_switchC_state = (CAPSWITCH)switchC_state;
01352 cap_switchC_count++;
01353 switchC_changed = 1;
01354 }
01355 }
01356 if(switchC_changed == 1){
01357 if(init_switchC_state == switchC_state){
01358 prev_switchC_state = (CAPSWITCH)switchC_state;
01359 cap_switchC_count--;
01360 if(cap_switchC_count < 0){
01361 gl_error("Unusual control of the capacitor has resulted in a negative switch change count on phase C.");
01362 return 0;
01363 }
01364 switchC_changed = 0;
01365 } else if(prev_switchC_state != switchC_state){
01366 prev_switchC_state = (CAPSWITCH)switchC_state;
01367 }
01368 }
01369 if(switchC_changed == 2){
01370 prev_switchC_state = (CAPSWITCH)switchC_state;
01371 }
01372 }
01373
01374 return 1;
01375 }
01376
01377
01378 double capacitor::cap_postPost_fxn(double result, double time_value)
01379 {
01380 CAPSWITCH cap_A_test_state, cap_B_test_state, cap_C_test_state;
01381 complex VoltVals[3];
01382 int return_status;
01383 OBJECT *obj = OBJECTHDR(this);
01384
01385 if ((control==VAR) || (control==VARVOLT))
01386 {
01387 READLOCK_OBJECT(OBJECTHDR(RLink));
01388
01389
01390 return_status = ((int (*)(OBJECT *))(*RLink_calculate_power_fxn))(RLink);
01391
01392 READUNLOCK_OBJECT(OBJECTHDR(RLink));
01393
01394
01395 if (return_status != 1)
01396 {
01397 GL_THROW("Capacitor:%d - %s - Link power calculation failed",obj->id,(obj->name ? obj->name : "Unnamed"));
01398
01399
01400
01401
01402 }
01403
01404
01405 VArVals[0] = (RLink_indiv_power_in[0]->get_complex()).Im();
01406 VArVals[1] = (RLink_indiv_power_in[1]->get_complex()).Im();
01407 VArVals[2] = (RLink_indiv_power_in[2]->get_complex()).Im();
01408
01409
01410
01411 if (solver_method == SM_NR)
01412 {
01413
01414 cap_A_test_state = switchA_state_Req_Next;
01415 cap_B_test_state = switchB_state_Req_Next;
01416 cap_C_test_state = switchC_state_Req_Next;
01417
01418
01419 if ((pt_phase & PHASE_A) == PHASE_A)
01420 {
01421 if (VAr_set_low >= VArVals[0])
01422 cap_A_test_state=OPEN;
01423 else if (VAr_set_high <= VArVals[0])
01424 cap_A_test_state=CLOSED;
01425 else;
01426 }
01427
01428
01429 if ((pt_phase & PHASE_B) == PHASE_B)
01430 {
01431 if (VAr_set_low >= VArVals[1])
01432 cap_B_test_state=OPEN;
01433 else if (VAr_set_high <= VArVals[1])
01434 cap_B_test_state=CLOSED;
01435 else;
01436 }
01437
01438
01439 if ((pt_phase & PHASE_C) == PHASE_C)
01440 {
01441 if (VAr_set_low >= VArVals[2])
01442 cap_C_test_state=OPEN;
01443 else if (VAr_set_high <= VArVals[2])
01444 cap_C_test_state=CLOSED;
01445 else;
01446 }
01447
01448
01449 if ((Iteration_Toggle == false) && (switchA_state_Req_Next != cap_A_test_state))
01450 result = time_value;
01451
01452 if ((Iteration_Toggle == false) && (switchB_state_Req_Next != cap_B_test_state))
01453 result = time_value;
01454
01455 if ((Iteration_Toggle == false) && (switchC_state_Req_Next != cap_C_test_state))
01456 result = time_value;
01457
01458
01459 if ((result != time_value) && (control == VARVOLT))
01460 {
01461
01462 if ((pt_phase & PHASE_D) != (PHASE_D))
01463 {
01464 if (RNode == NULL)
01465 {
01466 VoltVals[0] = voltage[0];
01467 VoltVals[1] = voltage[1];
01468 VoltVals[2] = voltage[2];
01469 }
01470 else
01471 {
01472 VoltVals[0] = RNode_voltage[0]->get_complex();
01473 VoltVals[1] = RNode_voltage[1]->get_complex();
01474 VoltVals[2] = RNode_voltage[2]->get_complex();
01475 }
01476 }
01477 else
01478 {
01479 if (RNode == NULL)
01480 {
01481 VoltVals[0] = voltaged[0];
01482 VoltVals[1] = voltaged[1];
01483 VoltVals[2] = voltaged[2];
01484 }
01485 else
01486 {
01487 VoltVals[0] = RNode_voltaged[0]->get_complex();
01488 VoltVals[1] = RNode_voltaged[1]->get_complex();
01489 VoltVals[2] = RNode_voltaged[2]->get_complex();
01490 }
01491 }
01492
01493
01494
01495 bool lockout_state_change[3];
01496 lockout_state_change[0] = lockout_state_change[1] = lockout_state_change[2] = false;
01497
01498 if ((pt_phase & PHASE_D) != (PHASE_D))
01499 {
01500 if (lockout_time_left_A <= 0)
01501 {
01502 if (((pt_phase & PHASE_A) == PHASE_A) && (VoltVals[0].Mag() >= voltage_set_high))
01503 {
01504 cap_A_test_state=OPEN;
01505 lockout_state_change[0] = true;
01506 }
01507 }
01508 else
01509 {
01510 cap_A_test_state=OPEN;
01511 }
01512
01513 if (lockout_time_left_B <= 0)
01514 {
01515 if (((pt_phase & PHASE_B) == PHASE_B) && (VoltVals[1].Mag() >= voltage_set_high))
01516 {
01517 cap_B_test_state=OPEN;
01518 lockout_state_change[1] = true;
01519 }
01520 }
01521 else
01522 {
01523 cap_B_test_state=OPEN;
01524 }
01525
01526 if (lockout_time_left_C <= 0)
01527 {
01528 if (((pt_phase & PHASE_C) == PHASE_C) && (VoltVals[2].Mag() >= voltage_set_high))
01529 {
01530 cap_C_test_state=OPEN;
01531 lockout_state_change[2] = true;
01532 }
01533 }
01534 else
01535 {
01536 cap_C_test_state=OPEN;
01537 }
01538 }
01539 else
01540 {
01541 if (lockout_time_left_A <= 0)
01542 {
01543 if (((pt_phase & (PHASE_A | PHASE_B)) == (PHASE_A | PHASE_B)) && (VoltVals[0].Mag() >= voltage_set_high))
01544 {
01545 cap_A_test_state=OPEN;
01546 lockout_state_change[0] = true;
01547 }
01548 }
01549 else
01550 {
01551 cap_A_test_state=OPEN;
01552 }
01553
01554 if (lockout_time_left_B <= 0)
01555 {
01556 if (((pt_phase & (PHASE_B | PHASE_C)) == (PHASE_B | PHASE_C)) && (VoltVals[1].Mag() >= voltage_set_high))
01557 {
01558 cap_B_test_state=OPEN;
01559 lockout_state_change[1] = true;
01560 }
01561 }
01562 else
01563 {
01564 cap_B_test_state=OPEN;
01565 }
01566
01567 if (lockout_time_left_C <= 0)
01568 {
01569 if (((pt_phase & (PHASE_C | PHASE_A)) == (PHASE_C | PHASE_A)) && (VoltVals[2].Mag() >= voltage_set_high))
01570 {
01571 cap_C_test_state=OPEN;
01572 lockout_state_change[2] = true;
01573 }
01574 }
01575 else
01576 {
01577 cap_C_test_state=OPEN;
01578 }
01579 }
01580
01581
01582 if ((Iteration_Toggle == false) && (switchA_state_Req_Next != cap_A_test_state))
01583 result = time_value;
01584
01585 if ((Iteration_Toggle == false) && (switchB_state_Req_Next != cap_B_test_state))
01586 result = time_value;
01587
01588 if ((Iteration_Toggle == false) && (switchC_state_Req_Next != cap_C_test_state))
01589 result = time_value;
01590
01591 }
01592 }
01593 }
01594 else if (control==CURRENT)
01595 {
01596
01597 CurrentVals[0]=(RLink_current_in[0]->get_complex()).Mag();
01598 CurrentVals[1]=(RLink_current_in[1]->get_complex()).Mag();
01599 CurrentVals[2]=(RLink_current_in[2]->get_complex()).Mag();
01600
01601
01602 if (solver_method == SM_NR)
01603 {
01604
01605 cap_A_test_state = switchA_state_Req_Next;
01606 cap_B_test_state = switchB_state_Req_Next;
01607 cap_C_test_state = switchC_state_Req_Next;
01608
01609
01610 if ((pt_phase & PHASE_A) == PHASE_A)
01611 {
01612 if (current_set_low >= CurrentVals[0])
01613 cap_A_test_state=OPEN;
01614 else if (current_set_high <= CurrentVals[0])
01615 cap_A_test_state=CLOSED;
01616 else;
01617 }
01618
01619 if ((pt_phase & PHASE_B) == PHASE_B)
01620 {
01621 if (current_set_low >= CurrentVals[1])
01622 cap_B_test_state=OPEN;
01623 else if (current_set_high <= CurrentVals[1])
01624 cap_B_test_state=CLOSED;
01625 else;
01626 }
01627
01628 if ((pt_phase & PHASE_C) == PHASE_C)
01629 {
01630 if (current_set_low >= CurrentVals[2])
01631 cap_C_test_state=OPEN;
01632 else if (current_set_high <= CurrentVals[2])
01633 cap_C_test_state=CLOSED;
01634 else;
01635 }
01636
01637
01638 if ((Iteration_Toggle == false) && (switchA_state_Req_Next != cap_A_test_state))
01639 result = time_value;
01640
01641 if ((Iteration_Toggle == false) && (switchB_state_Req_Next != cap_B_test_state))
01642 result = time_value;
01643
01644 if ((Iteration_Toggle == false) && (switchC_state_Req_Next != cap_C_test_state))
01645 result = time_value;
01646 }
01647
01648 }
01649 else if ((control==VOLT) && (solver_method == SM_NR))
01650 {
01651
01652 cap_A_test_state = switchA_state_Req_Next;
01653 cap_B_test_state = switchB_state_Req_Next;
01654 cap_C_test_state = switchC_state_Req_Next;
01655
01656
01657 if ((pt_phase & PHASE_D) != (PHASE_D))
01658 {
01659 if (RNode == NULL)
01660 {
01661 VoltVals[0] = voltage[0];
01662 VoltVals[1] = voltage[1];
01663 VoltVals[2] = voltage[2];
01664 }
01665 else
01666 {
01667 VoltVals[0] = RNode_voltage[0]->get_complex();
01668 VoltVals[1] = RNode_voltage[1]->get_complex();
01669 VoltVals[2] = RNode_voltage[2]->get_complex();
01670 }
01671 }
01672 else
01673 {
01674 if (RNode == NULL)
01675 {
01676 VoltVals[0] = voltaged[0];
01677 VoltVals[1] = voltaged[1];
01678 VoltVals[2] = voltaged[2];
01679 }
01680 else
01681 {
01682 VoltVals[0] = RNode_voltaged[0]->get_complex();
01683 VoltVals[1] = RNode_voltaged[1]->get_complex();
01684 VoltVals[2] = RNode_voltaged[2]->get_complex();
01685 }
01686 }
01687
01688 if ((pt_phase & PHASE_D) != (PHASE_D))
01689 {
01690 if ((pt_phase & PHASE_A) == PHASE_A)
01691 {
01692 if (voltage_set_low >= VoltVals[0].Mag())
01693 cap_A_test_state=CLOSED;
01694 else if (voltage_set_high <= VoltVals[0].Mag())
01695 cap_A_test_state=OPEN;
01696 else;
01697 }
01698
01699 if ((pt_phase & PHASE_B) == PHASE_B)
01700 {
01701 if (voltage_set_low >= VoltVals[1].Mag())
01702 cap_B_test_state=CLOSED;
01703 else if (voltage_set_high <= VoltVals[1].Mag())
01704 cap_B_test_state=OPEN;
01705 else;
01706 }
01707
01708 if ((pt_phase & PHASE_C) == PHASE_C)
01709 {
01710 if (voltage_set_low >= VoltVals[2].Mag())
01711 cap_C_test_state=CLOSED;
01712 else if (voltage_set_high <= VoltVals[2].Mag())
01713 cap_C_test_state=OPEN;
01714 else;
01715 }
01716 }
01717 else
01718 {
01719 if ((pt_phase & (PHASE_A | PHASE_B)) == (PHASE_A | PHASE_B))
01720 {
01721 if (voltage_set_low >= VoltVals[0].Mag())
01722 cap_A_test_state=CLOSED;
01723 else if (voltage_set_high <= VoltVals[0].Mag())
01724 cap_A_test_state=OPEN;
01725 else;
01726 }
01727
01728 if ((pt_phase & (PHASE_B | PHASE_C)) == (PHASE_B | PHASE_C))
01729 {
01730 if (voltage_set_low >= VoltVals[1].Mag())
01731 cap_B_test_state=CLOSED;
01732 else if (voltage_set_high <= VoltVals[1].Mag())
01733 cap_B_test_state=OPEN;
01734 else;
01735 }
01736
01737 if ((pt_phase & (PHASE_C | PHASE_A)) == (PHASE_C | PHASE_A))
01738 {
01739 if (voltage_set_low >= VoltVals[2].Mag())
01740 cap_C_test_state=CLOSED;
01741 else if (voltage_set_high <= VoltVals[2].Mag())
01742 cap_C_test_state=OPEN;
01743 else;
01744 }
01745 }
01746
01747
01748 if ((Iteration_Toggle == false) && (switchA_state_Req_Next != cap_A_test_state))
01749 result = time_value;
01750
01751 if ((Iteration_Toggle == false) && (switchB_state_Req_Next != cap_B_test_state))
01752 result = time_value;
01753
01754 if ((Iteration_Toggle == false) && (switchC_state_Req_Next != cap_C_test_state))
01755 result = time_value;
01756
01757 }
01758
01759
01760 return result;
01761 }
01762
01763
01764
01765 void capacitor::toggle_bank_status(bool des_status){
01766
01767 if (des_status==true)
01768 {
01769 if ((phases_connected & PHASE_A) == PHASE_A)
01770 {
01771 switchA_state = switchA_state_Next = switchA_state_Prev = CLOSED;
01772 }
01773
01774 if ((phases_connected & PHASE_B) == PHASE_B)
01775 {
01776 switchB_state = switchB_state_Next = switchB_state_Prev = CLOSED;
01777 }
01778
01779 if ((phases_connected & PHASE_C) == PHASE_C)
01780 {
01781 switchC_state = switchC_state_Next = switchC_state_Prev = CLOSED;
01782 }
01783 }
01784 else
01785 {
01786 if ((phases_connected & PHASE_A) == PHASE_A)
01787 {
01788 switchA_state = switchA_state_Next = switchA_state_Prev = OPEN;
01789 }
01790
01791 if ((phases_connected & PHASE_B) == PHASE_B)
01792 {
01793 switchB_state = switchB_state_Next = switchB_state_Prev = OPEN;
01794 }
01795
01796 if ((phases_connected & PHASE_C) == PHASE_C)
01797 {
01798 switchC_state = switchC_state_Next = switchC_state_Prev = OPEN;
01799 }
01800 }
01801
01802
01803 time_to_change = dwell_time_left = 0;
01804 }
01805
01806 int capacitor::isa(char *classname)
01807 {
01808 return strcmp(classname,"capacitor")==0 || node::isa(classname);
01809 }
01810
01812
01814
01815 SIMULATIONMODE capacitor::inter_deltaupdate_capacitor(unsigned int64 delta_time, unsigned long dt, unsigned int iteration_count_val,bool interupdate_pos)
01816 {
01817 OBJECT *hdr = OBJECTHDR(this);
01818 double curr_time_value;
01819 double deltat, deltatimedbl;
01820 double result_dbl;
01821 int retvalue;
01822 bool Phase_Mismatch;
01823 STATUS return_status_val;
01824
01825
01826 deltat = (double)dt/(double)DT_SECOND;
01827
01828
01829 curr_time_value = gl_globaldeltaclock;
01830
01831
01832 if ((iteration_count_val==0) && (interupdate_pos == false))
01833 {
01834
01835 deltatimedbl = (double)delta_time/(double)DT_SECOND;
01836
01837
01838 prev_time_dbl = (double)gl_globalclock + deltatimedbl;
01839
01840
01841 if (fmeas_type != FM_NONE)
01842 {
01843
01844 memcpy(&prev_freq_state,&curr_freq_state,sizeof(FREQM_STATES));
01845 }
01846 }
01847
01848
01849 if ((delta_time==0) && (iteration_count_val==0) && (interupdate_pos == false) && (fmeas_type != FM_NONE))
01850 {
01851
01852 init_freq_dynamics();
01853 }
01854
01855
01856 if ((GFA_enable == true) && (iteration_count_val == 0) && (interupdate_pos == false))
01857 {
01858
01859 GFA_Update_time = perform_GFA_checks(deltat);
01860 }
01861
01862 if (interupdate_pos == false)
01863 {
01864
01865 NR_node_presync_fxn(0);
01866
01867
01868 Phase_Mismatch = cap_sync_fxn(curr_time_value);
01869
01870
01871 NR_node_sync_fxn(hdr);
01872
01873
01874 if (service_status == ND_IN_SERVICE)
01875 {
01876 if (Phase_Mismatch == true)
01877 {
01878 if ((Iteration_Toggle == true) && (NR_cycle_cap == true))
01879 {
01880 deltamode_reiter_request = true;
01881 NR_cycle_cap = false;
01882 }
01883 }
01884 }
01885
01886
01887
01888
01889 return SM_DELTA;
01890
01891 }
01892 else
01893 {
01894
01895 retvalue = cap_prePost_fxn(curr_time_value);
01896
01897
01898 if (retvalue != 1)
01899 {
01900
01901 return SM_ERROR;
01902 }
01903
01904
01905 BOTH_node_postsync_fxn(hdr);
01906
01907
01908 if (fmeas_type != FM_NONE)
01909 {
01910 return_status_val = calc_freq_dynamics(deltat);
01911
01912
01913 if (return_status_val == FAILED)
01914 {
01915 return SM_ERROR;
01916 }
01917 }
01918
01919
01920
01921 result_dbl = TSNVRDBL;
01922
01923
01924 result_dbl = cap_postPost_fxn(result_dbl,curr_time_value);
01925
01926
01927 if ((result_dbl == curr_time_value) || (deltamode_reiter_request == true))
01928 {
01929
01930 deltamode_reiter_request = false;
01931
01932
01933 return SM_DELTA_ITER;
01934 }
01935
01936
01937
01938 if (GFA_enable == true)
01939 {
01940
01941 if ((GFA_Update_time > 0.0) && (GFA_Update_time < 1.7))
01942 {
01943
01944 return SM_DELTA;
01945 }
01946 else
01947 {
01948 return SM_EVENT;
01949 }
01950 }
01951 else
01952 {
01953 return SM_EVENT;
01954 }
01955 }
01956 }
01957
01959
01961
01969 EXPORT int create_capacitor(OBJECT **obj, OBJECT *parent)
01970 {
01971 try
01972 {
01973 *obj = gl_create_object(capacitor::oclass);
01974 if (*obj!=NULL)
01975 {
01976 capacitor *my = OBJECTDATA(*obj,capacitor);
01977 gl_set_parent(*obj,parent);
01978 return my->create();
01979 }
01980 else
01981 return 0;
01982 }
01983 CREATE_CATCHALL(capacitor);
01984 }
01985
01986
01987
01994 EXPORT int init_capacitor(OBJECT *obj)
01995 {
01996 try {
01997 capacitor *my = OBJECTDATA(obj,capacitor);
01998 return my->init(obj->parent);
01999 }
02000 INIT_CATCHALL(capacitor);
02001 }
02002
02011 EXPORT TIMESTAMP sync_capacitor(OBJECT *obj, TIMESTAMP t0, PASSCONFIG pass)
02012 {
02013 try {
02014 capacitor *pObj = OBJECTDATA(obj,capacitor);
02015 TIMESTAMP t1 = TS_NEVER;
02016 switch (pass) {
02017 case PC_PRETOPDOWN:
02018 return pObj->presync(t0);
02019 case PC_BOTTOMUP:
02020 return pObj->sync(t0);
02021 case PC_POSTTOPDOWN:
02022 t1 = pObj->postsync(t0);
02023 obj->clock = t0;
02024 return t1;
02025 default:
02026 throw "invalid pass request";
02027 }
02028 }
02029 SYNC_CATCHALL(capacitor);
02030 }
02031
02040 EXPORT int isa_capacitor(OBJECT *obj, char *classname)
02041 {
02042 return OBJECTDATA(obj,capacitor)->isa(classname);
02043 }
02044
02045
02046 EXPORT SIMULATIONMODE interupdate_capacitor(OBJECT *obj, unsigned int64 delta_time, unsigned long dt, unsigned int iteration_count_val, bool interupdate_pos)
02047 {
02048 capacitor *my = OBJECTDATA(obj,capacitor);
02049 SIMULATIONMODE status = SM_ERROR;
02050 try
02051 {
02052 status = my->inter_deltaupdate_capacitor(delta_time,dt,iteration_count_val,interupdate_pos);
02053 return status;
02054 }
02055 catch (char *msg)
02056 {
02057 gl_error("interupdate_capacitor(obj=%d;%s): %s", obj->id, obj->name?obj->name:"unnamed", msg);
02058 return status;
02059 }
02060 }
02061
02062 int capacitor::kmldata(int (*stream)(const char*,...))
02063 {
02064 int phase[3] = {has_phase(PHASE_A),has_phase(PHASE_B),has_phase(PHASE_C)};
02065 enumeration state[3] = {switchA_state, switchB_state, switchC_state};
02066 char *control_desc[] = {"MANUAL","VAR","VOLT","VARVOLT","CURRENT"};
02067
02068
02069 stream("<TR><TH ALIGN=LEFT>Status</TH>");
02070 for ( int i = 0 ; i<sizeof(phase)/sizeof(phase[0]) ; i++ )
02071 {
02072 if ( phase[i] )
02073 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\"><NOBR>%s</NOBR></TD>", state[i]?"CLOSED":"OPEN");
02074 else
02075 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\">—</TD>");
02076 }
02077 stream("</TR>\n");
02078
02079
02080 stream("<TR><TH ALIGN=LEFT>Control</TH>");
02081 if ( control_level==BANK )
02082 {
02083 stream("<TD ALIGN=CENTER COLSPAN=6 STYLE=\"font-family:courier;\"><NOBR>%s</NOBR></TD>", control_desc[control]);
02084 }
02085 else
02086 {
02087 for ( int i = 0 ; i<sizeof(phase)/sizeof(phase[0]) ; i++ )
02088 {
02089 if ( phase[i] )
02090 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\"><NOBR>%s</NOBR></TD>", control_desc[control]);
02091 else
02092 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\">—</TD>");
02093 }
02094 }
02095 stream("</TR>\n");
02096
02097
02098 gld_global run_realtime("run_realtime");
02099 gld_global server("hostname");
02100 gld_global port("server_portnum");
02101 if ( run_realtime.get_bool() )
02102 {
02103 stream("<TR><TH ALIGN=LEFT> </TH>");
02104 for ( int i = 0 ; i<sizeof(phase)/sizeof(phase[0]) ; i++ )
02105 {
02106 if ( phase[i] )
02107 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\"><FORM ACTION=\"http://%s:%d/kml/%s\" METHOD=GET><INPUT TYPE=SUBMIT NAME=\"switchA\" VALUE=\"%s\" /></FORM></TD>",
02108 (const char*)server.get_string(), port.get_int16(), (const char*)get_name(), state[i] ? "OPEN" : "CLOSE");
02109 else
02110 stream("<TD ALIGN=CENTER COLSPAN=2 STYLE=\"font-family:courier;\">—</TD>");
02111 }
02112 stream("</TR>\n");
02113 }
02114
02115 return 0;
02116 }
02117